Bus repeater and bit injector for MIL-STD-1553/1760 communications bus
| DWPI Title: System for facilitating selectively causing faults on MIL-STD-1553/1760 communications system in commercial and military aircraft and spacecraft to facilitate electronic control of e.g. fly-by-wire system, has transceiver configured to receive and transmit messages by way of communications bus |
| Abstract: A fault insertion device (FID) comprises a transceiver and an FPGA. The transceiver receives signals from a MIL-STD-1553/1760 communications bus. The FPGA evaluates the signals received from the communications bus against a set of rules stored by the FPGA. Based upon the set of rules, the FPGA can selectively modify messages received from the communications bus prior to transmission to a remote terminal or a bus controller that is configured to communicate on the communications bus. |
| Use: System for facilitating selectively causing faults on a MIL-STD-1553/1760 communications system in commercial and military aircraft and spacecraft to facilitate electronic control of aircraft/spacecraft components e.g. fly-by-wire system. |
| Advantage: The system realizes that fault insertion device (FID) facilitates causing selective communications faults on a MIL-STD-1553/1760 bus in real time based on bus traffic. The FID can modify a message transmitted on the communications bus by a bus controller to a message being received by a remote terminal to simulate a fault condition associated with the MIL-STD-1553/1760 communication system of the aircraft and/or cause one or more systems controlled by the MIL-STD-1553/1760 communication system to exhibit a particular behavior. The FID can be configured to selectively modify a message transmitted on the communications bus based on the received messages. The FID can selectively introduce communication faults in the MIL-STD-1553/1760 communications system to simulate certain failure conditions that are desirably tested by an operator of the FID by selective modification of messages. The system realizes that a pilot of an aircraft can provide control input to the aircraft by way of a yoke, so that a control system coupled to the yoke can detect motion of the yoke and output control signals to a bus controller coupled to a MIL-STD-1553/1760 communications bus. |
| Novelty: The system (100) has a transceiver configured to receive and transmit messages by way of a communications bus that is configured as a MIL-STD-1553 or MIL-STD-1760 communications bus. A field-programmable gate array (FPGA) is communicatively coupled to the transceiver, such that the FPGA transmits and receives messages on the communications bus by the transceiver. The FPGA determines whether the first bit matches a rule i.e. first rule and ordered set of rules, in response to receive a first signal from the communications bus at the transceiver, the first signal indicative of a first bit. The FPGA performs an action specified by the rule in response to determining that the first bit matches the rule. |
| Filed: 3/30/2022 |
| Application Number: US17708555A |
| Tech ID: SD 15602.0 |
| This invention was made with Government support under Contract No. DE-NA0003525 awarded by the United States Department of Energy/National Nuclear Security Administration. The Government has certain rights in the invention. |
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