| Abstract: A two-terminal memory device and methods for its use are provided. In the
device, a bottom electrode is electrically continuous with a first
operating terminal, and a control gate electrode is electrically
continuous with a second operating terminal. A stack of insulator layers
comprising a hopping conduction layer and a tunnel layer is contactingly
interposed between the bottom electrode and the control gate electrode.
The tunnel layer is thinner than the hopping conduction layer, and it has
a wider bandgap than the hopping conduction layer. The hopping conduction
layer consists of a material that supports electron hopping transport. |
| Filed: 2/24/2020 |
| Application Number: 16/798723 |
| This invention was made with Government support under Contract No. DE-NA0003525 awarded by the United States Department of Energy/National Nuclear Security Administration. The Government has certain rights in the invention. |
| Attribution for Derwent World Patents Index Records published on Sandia ® Clarivate. All rights reserved. Republication or redistribution of Clarivate content, including by framing or similar means, is prohibited without the prior written consent of Clarivate. Clarivate and its logo, as well as all other trademarks used herein are trademarks of their respective owners and used under license. |