Thermally-isolated silicon-based integrated circuits and related methods

DWPI Title: Thermally-isolated integrated circuit assembly, has upper cavity defined in top of body of dielectric material, and support bar formed in silicon-based substrate to provide physical contact between substrate and body of dielectric material
Abstract: Thermally isolated devices may be formed by performing a series of etches on a silicon-based substrate. As a result of the series of etches, silicon material may be removed from underneath a region of an integrated circuit (IC). The removal of the silicon material from underneath the IC forms a gap between remaining substrate and the integrated circuit, though the integrated circuit remains connected to the substrate via a support bar arrangement that suspends the integrated circuit over the substrate. The creation of this gap functions to release the device from the substrate and create a thermally-isolated integrated circuit.
Use: Thermally-isolated integrated circuit assembly.
Advantage: The assembly forms integrated circuits with orders of magnitude improvement in operational stability compared to existing devices by combining thermal isolation with temperature stability of ovenized configuration. The assembly controls temperature of integrated circuit at desired temperature through use of a heater resistor in an efficient manner. The assembly improves ability to combine mechanical structures and electronics on a thermally-stabilized silicon-based substrate allows for creation of a physical system.
Novelty: The assembly has an upper cavity defined in a top of a body of dielectric material. A piezoelectric resonator is suspended over an upper cavity and electrically connected to a complementary metal-oxide-semiconductor (CMOS) integrated circuit (30) through vertical electrical conductors extending within the body of dielectric material. The upper and lower cavities are interconnected by trenches in the body of dielectric material. A support bar (32) is formed in a silicon-based substrate to provide physical contact between the silicon-based substrate and the body of dielectric material.
Filed: 8/5/2013
Application Number: US13959136A
Tech ID: SD 12439.0
This invention was made with Government support under Contract No. DE-NA0003525 awarded by the United States Department of Energy/National Nuclear Security Administration. The Government has certain rights in the invention.
Data from Derwent World Patents Index, provided by Clarivate
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