Separating semiconductor devices from substrate by etching graded composition release layer disposed between semiconductor devices and substrate including forming protuberances that reduce stiction

DWPI Title: Separating semiconductor devices from substrate involves etching release layer coupled between semiconductors and substrate, until semiconductors are at least released, etching protuberance in release layer, and separating semiconductors
Abstract: A method includes etching a release layer that is coupled between a plurality of semiconductor devices and a substrate with an etch. The etching includes etching the release layer between the semiconductor devices and the substrate until the semiconductor devices are at least substantially released from the substrate. The etching also includes etching a protuberance in the release layer between each of the semiconductor devices and the substrate. The etch is stopped while the protuberances remain between each of the semiconductor devices and the substrate. The method also includes separating the semiconductor devices from the substrate. Other methods and apparatus are also disclosed.
Use: For separating semiconductor devices such as photovoltaic devices, from substrate (claimed).
Advantage: The method advantageously forms protuberances and/or non-flat surfaces between semiconductor devices and substrate as they help to prevent or at least reduce undesired attractive forces between semiconductor and substrate. The protuberances and/or non-flat surfaces may help to reduce contact areas between semiconductor devices and other nearby surfaces. Without protuberances or non-flat surfaces, bottom surfaces of semiconductor devices could potentially lie flat against top coplanar surface of substrate e.g. this may tend to occur in case of silicon dioxide layer which may also be used as release layer (without graded composition) for certain types of silicon based semiconductor devices when etch is not stopped while protuberances remain. Such relatively larger surface areas in contact would tend to experience relatively stronger attractive forces due to stiction, static cohesion, sticking, Van der Waals type forces, hydrogen bonding forces, or electrostatic forces. Such attractive forces tend to increase with increasing contact area, and are undesirable because they may tend to make it more difficult to separate semiconductor devices from substrate. Moreover, if some semiconductor devices are stuck but others are not, this may tend to make forces needed to separate semiconductor devices from substrate variable. The protuberances and/or non-flat surfaces may help to reduce or limit contact areas between semiconductor devices and substrate and thus limit such attractive forces. The semiconductor devices may contact protuberances at relatively small contact areas. Even if semiconductor devices slide, fall, or like, they still may contact relatively small and often rounded or curved surfaces the protuberances, which helps to reduce amount of stiction or other attractive forces. The method further provides ability to separate group III-V devices from substrate through use of receiving substrate, which may represent efficient way to handle group III-V devices and/or allows efficient assembly into module, package, or other deployment. There may be no requirement to use a pick-and-place machine, or otherwise handle individual ones of devices. For photovoltaic cells, ability to produce small cells by method offers various advantages, such as favorable photovoltaic efficiencies, various scaling effects due size, and ability to make flexible solar panels.
Novelty: Separating semiconductor devices from substrate involves: etching release layer that is coupled between several semiconductor devices (216-1, 216-2) and substrate (212) with etch, including etching release layer between semiconductor devices and substrate until semiconductor devices are at least released from substrate, and etching protuberance (220, 220-1, 220-2) in release layer between each of semiconductor devices and substrate; stopping etching while protuberances remain between each of semiconductor devices and substrate; and separating semiconductor devices from substrate.
Filed: 10/30/2013
Application Number: US14067433A
Tech ID: SD 12804.0
This invention was made with Government support under Contract No. DE-NA0003525 awarded by the United States Department of Energy/National Nuclear Security Administration. The Government has certain rights in the invention.
Data from Derwent World Patents Index, provided by Clarivate
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