Randomization of dangling nodes in a digital circuit design to mitigate hardware trojans
| DWPI Title: System for modifying nodes in digital circuit design for Ethernet controller is submitted by third parties for implementation in IC, comprises processor and memory that stores instructions, which is executed by processor |
| Abstract: Described herein are various technologies pertaining to randomizing logic associated with dangling nodes in a digital circuit design. A dangling node is an input to or output from a logic gate in the digital circuit design that is identified as not impacting a desired output of the digital circuit design. Randomizing the logic associated with a dangling node can include deleting a logic gate, adding a logic gate, replacing a logic gate with another logic gate, etc. Randomizing the logic associated with the dangling node prevents hardware trojans that may have been inserted into the circuit design from being implemented in a circuit that is generated based upon the design. |
| Use: System is used for modifying nodes in a digital circuit design for an Ethernet controller is submitted by third parties for implementation in integrated circuits (ICs) or field programmable gate arrays (FPGAs). |
| Advantage: The system is efficient and effective for preventing inclusion of hardware trojans in ICs and FPGAs, and saves the designer time and prevents from waste energy and resources on a standard circuit sub-design is easily obtainable. |
| Novelty: The system comprises a processor (104) and a memory (110) that stores instructions, which is executed by the processor. The processor perform acts for identifying the digital circuit design (113). A dangling node (118) fails to impact a function of the digital circuit design from multiple terminal inputs to multiple terminal outputs. Multiple terminal inputs are corresponding to a primary input. The digital circuit design and an output from a memory is in the digital circuit design. Multiple terminal outputs are corresponding to one of a primary output of the digital circuit design. An input has the memory in the digital circuit design. The digital circuit design is responsive for identifying the dangling node (120) within the digital circuit design. The digital circuit design are randomly modifying circuit logic, which is associated with the dangling node. |
| Filed: 12/19/2017 |
| Application Number: US15846571A |
| Tech ID: SD 14504.0 |
| This invention was made with Government support under Contract No. DE-NA0003525 awarded by the United States Department of Energy/National Nuclear Security Administration. The Government has certain rights in the invention. |
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