High voltage switch with cascaded transistor topology

DWPI Title: Switching apparatus for high-voltage switching, has first series-connected transistors that are connected in series, in which each of transistors has its own source, drain, and gate terminals
Abstract: A switching apparatus includes three or more series-connected transistors, and it further includes a balancing network. The balancing network includes a resistor network configured to divide a voltage from a voltage source across the series-connected transistors. The resistor network includes at least two resistive legs connected in parallel. In each resistive leg, two or more resistors are connected in series. The balancing network may further comprise at least one capacitive leg of series-connected capacitors connected across the series-connected transistors, and it may further comprise at least one leg of series-connected avalanche diodes connected across the series-connected transistors for overvoltage protection. In example embodiments, the series-connected transistors are JFETs. In other example embodiments, the series-connected transistors may be HEMTs or GaN transistors.
Use: Wide-bandgap power semiconductor switching apparatus for use in high-power applications. Uses include but are not limited to high-voltage switching devices such as junction field-effect transistor (JFET).
Advantage: The cascaded JFET configuration or other transistor configuration is operated without using a control metal oxide semiconductor (MOSFET) or other added control device. This can provide several benefits, including a more uniform thermal distribution across the devices which can, in turn, facilitate better thermal management. The full benefit of the low on-resistance of the cascaded jFETs or other transistors can be realized. The resilience of wide-bandwidth devices to harsh conditions can be fully enjoyed, leading to greater reliability under large surge currents and repeated switching stress, for example. A feature of the switch topology is a new type of voltage-balancing network, which offers improved performance when there are significant leakage currents.
Novelty: The switching apparatus comprises a first multiple n series-connected transistors, each of the transistors having a respective source terminal (14), a respective drain terminal, and a respective gate terminal, where for n a positive integer at least 3, the first multiple n series-connected transistors includes a first transistor, denominated J1, a last transistor, denominated Jn, and at least one transistor, denominated Ji, i having respective positive integer values between 1 and n. A terminal S connected to the J1 source terminal. A terminal D connected to the Jn drain terminal. A control terminal (15) G connected to the J1 gate terminal.
Filed: 5/5/2022
Application Number: US17737593A
Tech ID: SD 15912.0
This invention was made with Government support under Contract No. DE-NA0003525 awarded by the United States Department of Energy/National Nuclear Security Administration. The Government has certain rights in the invention.
Data from Derwent World Patents Index, provided by Clarivate
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