Ceramic substrate including thin film multilayer surface conductor
| DWPI Title: Ceramic substrate for electronic components e.g., resistors, capacitors, and inductors for integrated electronic circuits, has upper conductive layer which forms electrically conductive features on upper surface of top ceramic sheet |
| Abstract: A ceramic substrate comprises a plurality of ceramic sheets, a plurality of inner conductive layers, a plurality of vias, and an upper conductive layer. The ceramic sheets are stacked one on top of another and include a top ceramic sheet. The inner conductive layers include electrically conductive material that forms electrically conductive features on an upper surface of each ceramic sheet excluding the top ceramic sheet. The vias are formed in each of the ceramic sheets with each via being filled with electrically conductive material. The upper conductive layer includes electrically conductive material that forms electrically conductive features on an upper surface of the top ceramic sheet. The upper conductive layer is constructed from a stack of four sublayers. A first sublayer is formed from titanium. A second sublayer is formed from copper. A third sublayer is formed from platinum. A fourth sublayer is formed from gold. |
| Use: Ceramic substrate for electronic components e.g., resistors, capacitors, and inductors for integrated electronic circuits. Uses include but are not limited to analog circuits, digital circuits, mixed-signal circuits, radio frequency circuits e.g., transmitters or receivers. |
| Advantage: Achieves a ceramic substrate which provides a distinct advance in the art of forming a conductive layer on an upper surface of a ceramic substrate, and provides a multilayer metal stack which serves as a conductive layer on the upper surface of the ceramic substrate to prevent formation of oxides or whiskers. |
| Novelty: The ceramic substrate (10) has ceramic sheets (12) and inner conductive layers (14) which forms electrically conductive features on an upper surface of the ceramic sheet except for a top ceramic sheet. A set of via portions (16) is formed in each ceramic sheet, and filled with electrically conductive material. An upper conductive layer (20) with thin film sublayers forms electrically conductive features on an upper surface of the top ceramic sheet. |
| Filed: 9/30/2014 |
| Application Number: US14502745A |
| Tech ID: SD 13335.1 |
| This invention was made with Government support under Contract No. DE-NA0003525 awarded by the United States Department of Energy/National Nuclear Security Administration. The Government has certain rights in the invention. |
| Data from Derwent World Patents Index, provided by Clarivate All rights reserved. Republication or redistribution of Clarivate content, including by framing or similar means, is prohibited without the prior written consent of Clarivate. Clarivate and its logo, as well as all other trademarks used herein are trademarks of their respective owners and used under license. |