Fast frequency divider circuit using combinational logic
| DWPI Title: Electrical circuit for performing on-chip frequency division of operating frequency, has set of latches placed to receive multiple output signals and generate output, where output is division of oscillating frequency of ring oscillator |
| Abstract: The various technologies presented herein relate to performing on-chip frequency division of an operating frequency of a ring oscillator (RO). Per the various embodiments herein, a conflict between RO size versus operational frequency can be addressed by dividing the output frequency of the RO to a frequency that can be measured on-chip. A frequency divider circuit (comprising NOR gates and latches, for example) can be utilized in conjunction with the RO on the chip. In an embodiment, the frequency divider circuit can include a pair of latches coupled to the RO to facilitate dividing the oscillating frequency of the RO by 2. In another embodiment, the frequency divider circuit can include four latches (operating in pairs) coupled to the RO to facilitate dividing the oscillating frequency of the RO by 4. A plurality of ROs can be MUXed to the plurality of ROs by a single oscillation-counting circuit. |
| Use: Electrical circuit for performing on-chip frequency division of an operating frequency of a RO. |
| Advantage: The circuit enables increasing reduction in feature size and a phenomenon in which the RO reduces in size. |
| Novelty: The circuit (100) has a ring oscillator (RO) comprising a set of stages. The RO is placed to oscillate at frequency when the RO is energized with an electrical signal and output a first set of output signals from respective stages in RO stages. A set of NOR gates (142, 144) is placed to respectively receive the first multiple output signals and output a second set of output signals. A set of latches (132, 134) is placed to respectively receive the second set of output signals and generate an output, where the output is division of an oscillating frequency of the RO by an integer. |
| Filed: 3/22/2016 |
| Application Number: US15077598A |
| Tech ID: SD 12357.1 |
| This invention was made with Government support under Contract No. DE-NA0003525 awarded by the United States Department of Energy/National Nuclear Security Administration. The Government has certain rights in the invention. |
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