Lateral vias for connections to buried microconductors
| DWPI Title: Component with lateral via and buried conductor, includes lateral via having longitudinal dimension which is generally orthogonal or oblique to longitudinal dimension of buried conductor |
| Abstract: The present invention relates to a lateral via to provide an electrical connection to a buried conductor. In one instance, the buried conductor is a through via that extends along a first dimension, and the lateral via extends along a second dimension that is generally orthogonal to the first dimension. In another instance, the second dimension is oblique to the first dimension. Components having such lateral vias, as well as methods for creating such lateral vias are described herein. |
| Use: Component with lateral via and buried conductor, e.g., through-via. Uses include but are not limited to: an integrated circuit or its component (e.g., a field-programmable gate array); a chip; a package; a device (e.g., a microelectronic device, a memory device, or a logic device); a substrate (e.g., a semiconductor substrate or an interposer); an assembly; a stack (claimed); a die; or their combinations. |
| Advantage: Insulator portions can be present in any useful manner, so long as the electrical path is configured to remain between the conductive portions of the lateral via and the buried connector. By ensuring that the longitudinal dimensions of the buried conductor and the lateral via are different, additional dimensionality is achieved. |
| Novelty: The component (150) includes a buried conductor (154) and a lateral via (160) which are disposed within the component. The buried conductor is electrically inaccessible from an outer surface of the component. The lateral via is configured to electrically connect to the buried conductor. The longitudinal dimension of the lateral via is generally orthogonal or oblique to the longitudinal dimension of the buried conductor. An insulator portion (165) is disposed on a proximal portion of the lateral via, and configured to electrically isolate the lateral via. |
| Filed: 6/7/2016 |
| Application Number: US15175312A |
| Tech ID: SD 13473.0 |
| This invention was made with Government support under Contract No. DE-NA0003525 awarded by the United States Department of Energy/National Nuclear Security Administration. The Government has certain rights in the invention. |
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