Packaging system with cleaning channel and method of making the same

DWPI Title: Packaging system for attaching surface mounted integrated circuit package to printed circuit board, has cleaning channel whose portion is formed within bottom surface of surface mounted integrated circuit package
Abstract: A packaging structure and method for surface mount integrated circuits reduces electrochemical migration (ECM) problems by including one or more cleaning channels to effectively and efficiently remove flux residue that may otherwise remain lodged in gaps between the surface mount package and the printed circuit board. A cleaning channel may be formed along a bottom surface of the surface mount package (i.e., the surface facing the printed circuit board), or along a portion of a top surface of the printed circuit board. In either case, the inclusion of a cleaning channel enlarges the gap between the bottom surface of the surface mount package and the printed circuit board and creates a path for contaminants to be flushed out during a cleaning process.
Use: Packaging system for attaching a surface mounted integrated circuit package to a PCB in a semiconductor industry.
Advantage: The system utilizes the cleaning channel that enlarges the gap between the bottom surface of the surface mounted integrated circuit package and the printed circuit board and creates a path for contaminants to be flushed out during a cleaning process. The system eliminates flux residue between the PCB and the surface mounted integrated circuit package, while high pressure deionized water provides safest units of PCB cleaning.
Novelty: The system has a printed circuit board (PCB) (10) for supporting physical attachment and electrical connections to a surface mounted integrated circuit package. A cleaning channel (48) is formed between opposing surfaces of the PCB and the surface mounted integrated circuit package. The cleaning channel provides an enlarged gap to enhance removal of solder flux residue and minimize electrochemical migration based packaging system failure, where a portion of the cleaning channel is formed within a bottom surface of the surface mounted integrated circuit package.
Filed: 12/22/2016
Application Number: US15388210A
Tech ID: SD 13590.1
This invention was made with Government support under Contract No. DE-NA0003525 awarded by the United States Department of Energy/National Nuclear Security Administration. The Government has certain rights in the invention.
Data from Derwent World Patents Index, provided by Clarivate
All rights reserved. Republication or redistribution of Clarivate content, including by framing or similar means, is prohibited without the prior written consent of Clarivate. Clarivate and its logo, as well as all other trademarks used herein are trademarks of their respective owners and used under license.