Integrated circuit authentication from a die material measurement

DWPI Title: System for measuring signal generated die-based test circuit incorporated into integrated circuit (IC), that generates notification that die is sourced from wafer location detailed in label when test value is within predefined range
Abstract: The various technologies presented herein relate to measuring a signal generated by a die-based test circuit incorporated into an IC, and utilizing the measured signal to authenticate the IC. The signal can be based upon a sensor response generated by the test circuit fabricated into the die, wherein the sensor response is based upon a property of the die material. The signal can be compared with a reference value obtained from one or more test circuit(s) respectively located on one or more reference dies, wherein the reference dies are respectively cut from different wafers, and the location at which the reference dies were cut is known. If the measured signal matches the reference value, the die is deemed to be from the same cut location as the dies from which the reference value was obtained. If the measured signal does not match the reference value, the die is not authenticated.
Use: System for measuring signal generated die-based test circuit incorporated into IC to facilitate authentication of IC such as field programmable gate array (FPGA), application-specific integrated circuit (ASIC), processor, microprocessor, system on ship (SoC), programmable SoC, application-specific standard product (ASSP), programmable logic device (PLD) and complex PLD (CPLD) (all claimed).
Advantage: The test circuit configuration produces signal measurement having a high degree of repeatability across several dies has the same or similar material properties from the several test circuit configurations available and thus improving the accuracy and repeatability of the die authentication process. The system ensures an authorized supplier providing dies manufactured in accordance with an agreed specification.
Novelty: The system (100) has an IC comprises a die (120,153,154,158) sourced from a wafer (152). A material property is a function of a location of the die in the wafer from which the die was sourced when energized a test circuit (135) is configured to generate a signal based upon a property of material forming the die. A test system is configured to generate a test value based upon the signal generated at the test circuit. The test value is compared with a reference value to determine whether the test value is within a predefined range of the reference value. The reference value is based upon measurement sourced from several dies cut from a respective wafer and several dies is located in a position in its respective wafer that corresponds to the location of the die identified in the label. A notification is generated that the die is sourced from the wafer location is detailed in the label in responsive to determining that the test value is within the predefined range of the reference value.
Filed: 7/28/2016
Application Number: US15221814A
Tech ID: SD 13367.0
This invention was made with Government support under Contract No. DE-NA0003525 awarded by the United States Department of Energy/National Nuclear Security Administration. The Government has certain rights in the invention.
Data from Derwent World Patents Index, provided by Clarivate
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