Integrated circuit authentication from a die material measurement

DWPI Title: Method for measuring signal generated at integrated circuit (IC) to facilitate authentication of IC, involves outputting indication that die is sourced from location in wafer responsive to determining measured signal within range of value
Abstract: The various technologies presented herein relate to measuring a signal generated by a die-based test circuit incorporated into an IC and utilizing the measured signal to authenticate the IC. The signal can be based upon a sensor response generated by the test circuit fabricated into the die, wherein the sensor response is based upon a property of the die material. The signal can be compared with a reference value obtained from one or more test circuit(s) respectively located on one or more reference dies, wherein the reference dies are respectively cut from different wafers, and the location at which the reference dies were cut is known. If the measured signal matches the reference value, the die is deemed to be from the same cut location as the dies from which the reference value was obtained. If the measured signal does not match the reference value, the die is not authenticated.
Use: Method for measuring signal generated at integrated circuit (IC) to facilitate authentication of IC.
Advantage: The test circuit configuration can be determined that produces signal measurements having a high degree of repeatability across multiple dies having the same or similar material properties, thus improving the accuracy and repeatability of the die authentication process. The variation in properties between respective dies can be detected by test circuit. A malicious entity can attempt to minimize any variation between configurations of a test circuit on a malicious die owing to property variation inherent in a process.
Novelty: The method involves measuring a signal generated by an electrical circuit that is formed in a die (120) incorporated in an integrated circuit (IC) (130). The die is labeled as is cut from a first location in a first wafer (152a-152n). The measured signal is compared with a reference value derived from a reference die sourced from a second wafer. The reference die is cut from the second wafer at a reference location in the wafer that corresponds to the first location in the first wafer. An indication that the die is sourced from the location in the wafer is outputted responsive to determining that the measured signal is within a predefined range of the reference value.
Filed: 8/20/2019
Application Number: US16545943A
Tech ID: SD 13367.1
This invention was made with Government support under Contract No. DE-NA0003525 awarded by the United States Department of Energy/National Nuclear Security Administration. The Government has certain rights in the invention.
Data from Derwent World Patents Index, provided by Clarivate
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