Abstract: New methods for fabrication of silicon microstructures have been developed. In these methods, an etching delay layer is deposited and patterned so as to provide differential control on the depth of features being etched into a substrate material. Compensation for etching-related structural artifacts can be accomplished by proper use of such an etching delay layer. |
Filed: 6/6/2002 |
Application Number: 10/165356 |
This invention was made with Government support under Contract No. DE-NA0003525 awarded by the United States Department of Energy/National Nuclear Security Administration. The Government has certain rights in the invention. |
Attribution for Derwent World Patents Index Records published on Sandia ® echo date('Y'); ?> Clarivate. All rights reserved. Republication or redistribution of Clarivate content, including by framing or similar means, is prohibited without the prior written consent of Clarivate. Clarivate and its logo, as well as all other trademarks used herein are trademarks of their respective owners and used under license. |