High-speed CMOS camera

Abstract: A high-speed CMOS camera includes an array of pixel circuits coupled to a photodiode array, an oscillator circuit, and a pattern generator circuit. The pattern generator circuit includes a high speed shift register and a non-overlap generator. The shift register is programmable to produce a pulse train of trigger pulses that defines an interframe and a frame's shutter duration. The non-overlap generator deserializes the incoming pulse train of trigger pulses, and it produces a time-separated reset pulse based on the pulse train of trigger pulses. The shift register is configured to permit the frame durations and the interframe times to be selected arbitrarily over specified ranges in increments of a basic time unit that depends on the oscillator period.
Filed: 8/11/2016
Application Number: 15/234636
This invention was made with Government support under Contract No. DE-NA0003525 awarded by the United States Department of Energy/National Nuclear Security Administration. The Government has certain rights in the invention.
Attribution for Derwent World Patents Index Records published on Sandia ® Clarivate. All rights reserved. Republication or redistribution of Clarivate content, including by framing or similar means, is prohibited without the prior written consent of Clarivate. Clarivate and its logo, as well as all other trademarks used herein are trademarks of their respective owners and used under license.