| Abstract: | A demultiplexer circuit is disclosed which can be used with a
conventional neural stimulator to extend the number of electrodes which
can be activated. The demultiplexer circuit, which is formed on a
semiconductor substrate containing a power supply that provides all the
dc electrical power for operation of the circuit, includes digital
latches that receive and store addressing information from the neural
stimulator one bit at a time. This addressing information is used to
program one or more 1:2.sup.N demultiplexers in the demultiplexer circuit
which then route neural stimulation signals from the neural stimulator to
an electrode array which is connected to the outputs of the 1:2.sup.N
demultiplexer. The demultiplexer circuit allows the number of individual
electrodes in the electrode array to be increased by a factor of 2.sup.N
with N generally being in a range of 2-4. |