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Processing device with self-scrubbing logic

United States Patent

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October 17, 2017
View the Complete Patent at the US Patent & Trademark Office
Configuration Self-Scrubber for Xilinx Virtex-5QV FPGAs
An apparatus includes a processing unit including a configuration memory and self-scrubber logic coupled to read the configuration memory to detect compromised data stored in the configuration memory. The apparatus also includes a watchdog unit external to the processing unit and coupled to the self-scrubber logic to detect a failure in the self-scrubber logic. The watchdog unit is coupled to the processing unit to selectively reset the processing unit in response to detecting the failure in the self-scrubber logic. The apparatus also includes an external memory external to the processing unit and coupled to send configuration data to the configuration memory in response to a data feed signal outputted by the self-scrubber logic.
January 18, 2016
G06F 11/07 (20060101); G06F 11/10 (20060101); G06F 11/14 (20060101);
STATEMENT REGARDING FEDERALLY SPONSORED RESEARCH This invention was developed with Government support under Contract No. DE-AC04-94AL85000 between Sandia Corporation and the U.S. Department of Energy. The U.S. Government has certain rights in this invention.