Abstract: A computational memory for a computer. The memory includes a memory bank
having a selected-row buffer and being configured to store records up to
a number, K. The memory also includes an accumulator connected to the
memory bank, the accumulator configured to store up to K records. The
memory also includes an arithmetic and logic unit (ALU) connected to the
accumulator and to the selected row buffer of the memory bank, the ALU
having an indirect network of 2K ports for reading and writing records in
the memory bank and the accumulator, and the ALU further physically
configured to operate as a sorting network. The memory also includes a
controller connected to the memory bank, the ALU, and the accumulator,
the controller being hardware configured to direct operation of the ALU. |
Filed: 1/26/2018 |
Application Number: 15/881502 |
This invention was made with Government support under Contract No. DE-NA0003525 awarded by the United States Department of Energy/National Nuclear Security Administration. The Government has certain rights in the invention. |
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