| Abstract: | A two-terminal memory device and methods for its use are provided. In the
device, a bottom electrode is electrically continuous with a first
operating terminal, and a control gate electrode is electrically
continuous with a second operating terminal. A stack of insulator layers
comprising a hopping conduction layer and a tunnel layer is contactingly
interposed between the bottom electrode and the control gate electrode.
The tunnel layer is thinner than the hopping conduction layer, and it has
a wider bandgap than the hopping conduction layer. The hopping conduction
layer consists of a material that supports electron hopping transport. |