| Abstract: Described herein are various technologies pertaining to randomizing logic
associated with dangling nodes in a digital circuit design. A dangling
node is an input to or output from a logic gate in the digital circuit
design that is identified as not impacting a desired output of the
digital circuit design. Randomizing the logic associated with a dangling
node can include deleting a logic gate, adding a logic gate, replacing a
logic gate with another logic gate, etc. Randomizing the logic associated
with the dangling node prevents hardware trojans that may have been
inserted into the circuit design from being implemented in a circuit that
is generated based upon the design. |
| Filed: 12/19/2017 |
| Application Number: 15/846571 |
| This invention was made with Government support under Contract No. DE-NA0003525 awarded by the United States Department of Energy/National Nuclear Security Administration. The Government has certain rights in the invention. |
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