Bus repeater and bit injector for MIL-STD-1553/1760 communications bus
| Patent Number: | 11928015 |
| Issued: | 3/12/2024 |
| Official Filing: | View the Complete Patent |
| Abstract: | A fault insertion device (FID) comprises a transceiver and an FPGA. The transceiver receives signals from a MIL-STD-1553/1760 communications bus. The FPGA evaluates the signals received from the communications bus against a set of rules stored by the FPGA. Based upon the set of rules, the FPGA can selectively modify messages received from the communications bus prior to transmission to a remote terminal or a bus controller that is configured to communicate on the communications bus. |
| Filed: | 3/30/2022 |
| Government Interests: | STATEMENT OF GOVERNMENT INTEREST This invention was made with Government support under Contract No. DE-NA0003525 awarded by the United States Department of Energy/National Nuclear Security Administration. The Government has certain rights in the invention. |