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Randomization of dangling nodes in a digital circuit design to mitigate hardware trojans

United States Patent

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July 7, 2020
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Described herein are various technologies pertaining to randomizing logic associated with dangling nodes in a digital circuit design. A dangling node is an input to or output from a logic gate in the digital circuit design that is identified as not impacting a desired output of the digital circuit design. Randomizing the logic associated with a dangling node can include deleting a logic gate, adding a logic gate, replacing a logic gate with another logic gate, etc. Randomizing the logic associated with the dangling node prevents hardware trojans that may have been inserted into the circuit design from being implemented in a circuit that is generated based upon the design.
December 19, 2017
G06F 21/00 (20130101); G06F 21/85 (20130101); G06F 30/327 (20200101);
STATEMENT OF GOVERNMENTAL INTEREST This invention was made with Government support under Contract No. DE-NA0003525 awarded by the United States Department of Energy/National Nuclear Security Administration. The U.S. Government has certain rights in the invention.